Low power hardware and software implementation of IDEA NXT algorithm

Encryption algorithms are becoming more necessary to ensure data is securely transmitted over insecure communication channels. IDEA NXT is a recently developed symmetric block algorithm and its structure is based on the already proven IDEA (International Data Encryption Algorithm) cipher. Its top-level structure uses the Lai-Massey scheme and the round functions used in the scheme are substitution permutation networks (SPN). Its flexibility lies in the fact that it can be efficiently implemented in hardware and software. Implementation of cryptographic algorithms has recently attracted researchers in terms of power usage. For various applications, minimising the consumed power has become an important challenge for cryptographers. With the advent of side channel attacks, this task has become even more difficult because a programmer must take into account countermeasures against such attacks, which often increase computations, and hence power consumption. We report some of the first results of implementing the cipher on an FPGA and on a low power microcontroller.