TY - JOUR
T1 - Machine learning for FPGA electronic design automation
AU - Biscontini, A.
AU - Popovici, E.
AU - Temko, A.
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2024
Y1 - 2024
N2 - In the last decades, field-programmable gate arrays (FPGAs) have become increasingly important to the electronics industry, offering higher performance and lower power consumption as transistor technology continues to scale down. Machine learning (ML) algorithms have become pivotal in the electronic design automation (EDA) of FPGAs, enabling the learning of relationships between input and the desired output based on representative data properties rather than physical laws. As FPGA capacity expands, the EDA tools must also scale to handle larger, denser digital systems, and ML offers to fill the gap with resulting computational efficiency and improved solution quality. This study reviews ML methods utilized in FPGA EDA, from the perspective of formulated problems, input space representation, learned mapping, and methods used to achieve that. The work also presents the main ML methodologies and future challenges, serving as a roadmap for FPGA practitioners to navigate in the area of ML for FPGA EDA.
AB - In the last decades, field-programmable gate arrays (FPGAs) have become increasingly important to the electronics industry, offering higher performance and lower power consumption as transistor technology continues to scale down. Machine learning (ML) algorithms have become pivotal in the electronic design automation (EDA) of FPGAs, enabling the learning of relationships between input and the desired output based on representative data properties rather than physical laws. As FPGA capacity expands, the EDA tools must also scale to handle larger, denser digital systems, and ML offers to fill the gap with resulting computational efficiency and improved solution quality. This study reviews ML methods utilized in FPGA EDA, from the perspective of formulated problems, input space representation, learned mapping, and methods used to achieve that. The work also presents the main ML methodologies and future challenges, serving as a roadmap for FPGA practitioners to navigate in the area of ML for FPGA EDA.
KW - Artificial intelligence
KW - Electronic design automation
KW - Field programmable gate arrays
KW - Machine learning
UR - https://www.scopus.com/pages/publications/85211440801
U2 - 10.1109/ACCESS.2024.3511345
DO - 10.1109/ACCESS.2024.3511345
M3 - Article
AN - SCOPUS:85211440801
SN - 2169-3536
JO - IEEE Access
JF - IEEE Access
ER -