@inbook{d5067359d7394de3bc14c38d87b0147c,
title = "Material aspects and challenges for SOI FinFET integration",
abstract = "FinFET is a promismg device concept towards the 32 mn CMOS technology node and beyond as it combines the benefits of multigated architecture, intrinsically having superior scaling behavior, with a highly manufacturable process. The present paper will deal with material aspects of the SOI FinFET integration. We investigate scalability, performance and variability of high aspect ratio trigate FinFETs fabricated with 193nm immersion lithography and conventional dry etch. The effect of gate stack conformality on device performance is studied. The use of ion implantation for extension and the selective epitaxial growth of Si to achieve larger contact area on the source/drain areas are discussed from a materials perspective.",
author = "\{Van Dal\}, \{M. J.H.\} and G. Vellianitis and R. Duffy and G. Doornbos and Pawlak, \{B. J.\} and B. Duriez and Lai, \{L. S.\} and A. Hikavyy and T. Vandeweyer and M. Demand and E. Altamirano and R. Rooyackers and L. Witters and N. Collaert and M. Jurczak and M. Kaiser and Weemaes, \{R. G.R.\} and Lander, \{R. J.P.\}",
year = "2008",
doi = "10.1149/1.2911503",
language = "English",
isbn = "9781566776264",
series = "ECS Transactions",
number = "1",
pages = "223--234",
booktitle = "ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4",
edition = "1",
note = "Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS: New Materials, Processes, and Equipment, 4 ; Conference date: 18-05-2008 Through 22-05-2008",
}