Modeling and pareto optimization of microfabricated inductors for power supply on chip

Microfabricated inductors experience increasing interest and research activity because of their high potential in buck converters for power supply in package and power supply on chip applications. This paper details the modeling and optimization of microfabricated racetrack inductors. The analytical expressions derived characterize inductance, efficiency, and power density based on geometrical parameters, inductor current, and switching frequency. An accurate analysis of the inductor current that includes the impact of losses is performed to determine the switching frequency, the ac copper losses, and the core losses. The presented model is compared to finite element method simulations and reported results of three microfabricated inductors. Finally, the optimum tradeoff between efficiency and power density is identified using the Pareto front, which results from the evaluation of a large number of microfabricated inductors in the design space defined by the application.