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Nanowire-based anisotropic conductive film: A low temperature, ultra-fine pitch ionterconnect solution

Research output: Contribution to journalArticlepeer-review

Abstract

Advanced microelectronics packaging, driven by the multiple benefits of system performance, power, size, and cost, has now entered the three-dimensional (3-D) era. According to the International Technology Roadmap for Semiconductors 2012 [1], the interconnect pitch size is predicted to be 4-16 μm at the global interconnect level by the year 2018. Silicon die incorporated with through-silicon-via (TSV) technology [2] can be stacked using solder microbumps as high-density interconnects [3]. However, solder microbump technology faces many challenges because of the intermetallic compound growth and an underfill requirement as the bump size reduces [4]. Meanwhile, the temperature of the soldering process is more than 260 °C, which can result in high thermal stress in the devices and impact the thermal budget of the processing, particularly for the multitechnology node-stacking processes [5]. Therefore, developing interconnect methods, which can provide ultrafine-pitch capability and low-temperature process for 3-D systems, attracts continuous attention from industry [6].

Original languageEnglish
Article number7012076
Pages (from-to)4-11
Number of pages8
JournalIEEE Nanotechnology Magazine
Volume9
Issue number1
DOIs
Publication statusPublished - 1 Mar 2015

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 9 - Industry, Innovation, and Infrastructure
    SDG 9 Industry, Innovation, and Infrastructure

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