Packaging and test technologies

The previous chapters have described many investments in programs to advance PIC technologies, resulting in the rapid growth of highly innovative PIC-based solutions for a wide range of applications and markets. However, much of this activity has focused on the PIC chip, and there are assembly and packaging bottlenecks which impede users from commercializing full system solutions. Current packaging processes typically rely on package-by-package or “package-level” processes, where optical and electrical interconnects are completed when the photonic device has already been placed in the mechanical package. This serial style process flow is difficult to automate and has limited throughput, with scale-up in production directly related to the number of packaging machines used. Historically, such serial processes were acceptable for low-volume high-value applications, such as long-haul fiber optic communications but for emerging high-volume applications in data center and HPC markets, more scalable solutions are required. A typical serial packaging process for a telecom component involves the photonic device being assembled in the package, electrical connections formed using gold ribbon wire bonding, active alignment of the optical fiber to PIC chip to maximize coupling efficiency and hermetic sealing of the mechanical housing in an inert atmosphere. This package-level process is slow, as it typically takes tens of minutes to complete. The process is also incapable of meeting the demands of diverse applications due to the relative inflexibility of the package design and the inability to make significant changes in the process flow. PIC testing also follows the package-level approach which severely limits throughput. This situation is further complicated by the introduction of complex PIC chips which have many optical and electrical connections, often requiring specialized electrical interconnects for high-frequency operation. The packages also have demanding thermal requirements because of the exceptionally high levels of component integration and heat generated by active photonic and electronic devices. A high level overview of the main optical, electrical, thermal and mechanical packaging technologies have been shown with the help of figures in the chapter. All of these packaging technologies are usually simultaneously required for any specific application. The result is that PIC module integration, packaging and test production costs still typically account for over 50% of the overall PIC module manufacturing cost, compared to 10%–20% for microelectronic devices. There is a clear need for cost-effective and scalable PIC packaging and test technology, a technology that can be easily accessed by companies using PICs and which can be integrated into their supply chains. The need for more automated packaging technologies is enormous, enhancing opportunities in existing markets and supporting the growth of new markets and applications.