Packaging challenges for integrated silicon photonic circuits

Research output: Chapter in Book/Report/Conference proceedingsChapterpeer-review

Abstract

Cost-effective packaging of silicon photonic devices presents a significant bottleneck to commercialization of the technology. One way of addressing this packaging challenge is to use techniques that have been developed by the electronics industry and which also benefit from the use of advanced electronics assembly equipment. Even packaging processes such as fiber coupling can benefit from this approach, along with the hybrid integration of devices such as electronic components (e.g. modulator driver integrated circuits). In this paper, we will present developments made by our group towards achieving scalable fiber and electronic packaging processes that rely on electronic assembly techniques such as flip-chip assembly. We will also provide an overview of packaged prototypes being developed within our group for telecom and sensing applications and how these packaging technologies are now being made available to users through the ePIXfab foundry service.

Original languageEnglish
Title of host publicationSilicon Photonics and Photonic Integrated Circuits IV
PublisherSPIE
ISBN (Print)9781628410815
DOIs
Publication statusPublished - 2014
EventSilicon Photonics and Photonic Integrated Circuits IV - Brussels, Belgium
Duration: 14 Apr 201417 Apr 2014

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume9133
ISSN (Print)0277-786X
ISSN (Electronic)1996-756X

Conference

ConferenceSilicon Photonics and Photonic Integrated Circuits IV
Country/TerritoryBelgium
CityBrussels
Period14/04/1417/04/14

Keywords

  • Fiber coupling
  • Hybrid integration
  • Packaging
  • Silicon photonics

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