Abstract
The demand for photonic systems based on Silicon CMOS technology is driven by its ability to satisfy demands in large markets, particularly for telecoms, datacoms and sensing applications. Device fabrication based on CMOS wafer-scale processes can meet this demand. However, photonic packaging can be a deviceby-device process which is difficult to scale to high volumes. Packaging challenges remain in areas such as fiber-array coupling, laser source and electronic integration, and efficient thermal management. This chapter reviews these challenges and solutions that address them. It also reviews efforts to develop common photonic packaging design rules, which if implemented at the device layout stage, can greatly simplify the overall manufacturing process and help reduce production costs.
| Original language | English |
|---|---|
| Title of host publication | Topics in Applied Physics |
| Publisher | Springer Verlag |
| Pages | 217-236 |
| Number of pages | 20 |
| DOIs | |
| Publication status | Published - 1 Jan 2016 |
Publication series
| Name | Topics in Applied Physics |
|---|---|
| Volume | 122 |
| ISSN (Print) | 0303-4216 |
| ISSN (Electronic) | 1437-0859 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 9 Industry, Innovation, and Infrastructure
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