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Parasitic inductance effect on switching losses for a high frequency Dc-Dc converter

  • Thomas Meade
  • , Dara O'Sullivan
  • , Raymond Foley
  • , Cristian Achimescu
  • , Michael Egan
  • , Paul McCloskey

Research output: Chapter in Book/Report/Conference proceedingsConference proceedingpeer-review

Abstract

This work examines the impact of packaging parasitics on the efficiency of a synchronous DC-DC buck converter. An anayticai model of the losses in the converter is developed and this is compared to practical results at switching frequencies in the range of 1-2 MHz. The effect that the packaging parasitic inductance has on efficiency is highlighted by predicting the expected losses from a converter with optimised packaging parasitics.

Original languageEnglish
Title of host publication2008 23rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC
Pages3-9
Number of pages7
DOIs
Publication statusPublished - 2008
Event2008 23rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC - Austin, TX, United States
Duration: 24 Feb 200828 Feb 2008

Publication series

NameConference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Conference

Conference2008 23rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC
Country/TerritoryUnited States
CityAustin, TX
Period24/02/0828/02/08

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