Precision Voltage Sensing in Deep Sub-micron and Its Challenges

Research output: Chapter in Book/Report/Conference proceedingsChapterpeer-review

Abstract

Realising high precision Analog to Digital Converters (ADCs) in 28 nm and below is a significant challenge. Traditional Sigma Delta architectures are not compatible with reduced voltage rails and transistor gain. While Successive Approximation Register (SAR) ADCs have scaled well with technology nodes, they have struggled to consistently and reliably achieve 12+ bit performance. A new emerging architecture, the Noise-Shaped SAR ADC, leverages the advantages of both architectures. However, it is the author's view that there are still many challenges that need to be addressed which are discussed here to realise a high precision converter in these deep sub-micron nodes.

Original languageEnglish
Title of host publicationAnalog Circuits for Machine Learning, Current/Voltage/Temperature Sensors, and High-speed Communication
Subtitle of host publicationAdvances in Analog Circuit Design 2021
PublisherSpringer International Publishing
Pages137-163
Number of pages27
ISBN (Electronic)9783030917418
ISBN (Print)9783030917401
DOIs
Publication statusPublished - 24 Mar 2022

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