Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC

Brian Baldwin; William P. Marnane; Robert Granger

doi:10.1109/ReConFig.2009.67

Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC

Brian Baldwin
, William P. Marnane
, Robert Granger

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

Abstract

The dominant cost in Elliptic Curve Cryptography (ECC) over prime fields is modular multiplication. Minimal Redundancy Cyclotomic Primes (MRCPs) were recently introduced by Granger et al. for use as base field moduli in ECC, since they permit a novel and very efficient modular multiplication algorithm. Here we consider a reconfigurable hardware implementation of arithmetic modulo a 258-bit example, for use at the 128-bit AES security level. We examine this implementation for speed and area using parallelisation methods and inbuilt FPGA resources. The results are compared against a current method in use, the Montgomery multiplier.

Original language	English
Title of host publication	ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs
Pages	255-260
Number of pages	6
DOIs	https://doi.org/10.1109/ReConFig.2009.67
Publication status	Published - 2009
Event	2009 International Conference on ReConFigurable Computing and FPGAs, ReConFig'09 - Cancun, Mexico Duration: 9 Dec 2009 → 11 Dec 2009

Publication series

Name	ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs

Conference

Conference	2009 International Conference on ReConFigurable Computing and FPGAs, ReConFig'09
Country/Territory	Mexico
City	Cancun
Period	9/12/09 → 11/12/09

Keywords

Elliptic curve cryptography
Minimal redundancy cyclotomic primes
Modular multiplication

Access to Document

10.1109/ReConFig.2009.67

Cite this

Baldwin, B., Marnane, W. P., & Granger, R. (2009). Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC. In ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs (pp. 255-260). Article 5382061 (ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs). https://doi.org/10.1109/ReConFig.2009.67

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title = "Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC",

abstract = "The dominant cost in Elliptic Curve Cryptography (ECC) over prime fields is modular multiplication. Minimal Redundancy Cyclotomic Primes (MRCPs) were recently introduced by Granger et al. for use as base field moduli in ECC, since they permit a novel and very efficient modular multiplication algorithm. Here we consider a reconfigurable hardware implementation of arithmetic modulo a 258-bit example, for use at the 128-bit AES security level. We examine this implementation for speed and area using parallelisation methods and inbuilt FPGA resources. The results are compared against a current method in use, the Montgomery multiplier.",

keywords = "Elliptic curve cryptography, Minimal redundancy cyclotomic primes, Modular multiplication",

author = "Brian Baldwin and Marnane, \{William P.\} and Robert Granger",

year = "2009",

doi = "10.1109/ReConFig.2009.67",

language = "English",

isbn = "9780769539171",

series = "ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs",

pages = "255--260",

booktitle = "ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs",

note = "2009 International Conference on ReConFigurable Computing and FPGAs, ReConFig'09 ; Conference date: 09-12-2009 Through 11-12-2009",

}

Baldwin, B, Marnane, WP & Granger, R 2009, Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC. in ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs., 5382061, ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs, pp. 255-260, 2009 International Conference on ReConFigurable Computing and FPGAs, ReConFig'09, Cancun, Mexico, 9/12/09. https://doi.org/10.1109/ReConFig.2009.67

Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC. / Baldwin, Brian; Marnane, William P.; Granger, Robert.
ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs. 2009. p. 255-260 5382061 (ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs).

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

TY - GEN

T1 - Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC

AU - Baldwin, Brian

AU - Marnane, William P.

AU - Granger, Robert

PY - 2009

Y1 - 2009

N2 - The dominant cost in Elliptic Curve Cryptography (ECC) over prime fields is modular multiplication. Minimal Redundancy Cyclotomic Primes (MRCPs) were recently introduced by Granger et al. for use as base field moduli in ECC, since they permit a novel and very efficient modular multiplication algorithm. Here we consider a reconfigurable hardware implementation of arithmetic modulo a 258-bit example, for use at the 128-bit AES security level. We examine this implementation for speed and area using parallelisation methods and inbuilt FPGA resources. The results are compared against a current method in use, the Montgomery multiplier.

AB - The dominant cost in Elliptic Curve Cryptography (ECC) over prime fields is modular multiplication. Minimal Redundancy Cyclotomic Primes (MRCPs) were recently introduced by Granger et al. for use as base field moduli in ECC, since they permit a novel and very efficient modular multiplication algorithm. Here we consider a reconfigurable hardware implementation of arithmetic modulo a 258-bit example, for use at the 128-bit AES security level. We examine this implementation for speed and area using parallelisation methods and inbuilt FPGA resources. The results are compared against a current method in use, the Montgomery multiplier.

KW - Elliptic curve cryptography

KW - Minimal redundancy cyclotomic primes

KW - Modular multiplication

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U2 - 10.1109/ReConFig.2009.67

DO - 10.1109/ReConFig.2009.67

M3 - Conference proceeding

AN - SCOPUS:77950491248

SN - 9780769539171

T3 - ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs

SP - 255

EP - 260

BT - ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs

T2 - 2009 International Conference on ReConFigurable Computing and FPGAs, ReConFig'09

Y2 - 9 December 2009 through 11 December 2009

ER -

Reconfigurable hardware implementation of arithmetic modulo minimal redundancy cyclotomic primes for ECC

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