@inbook{725d31bcb2cd42ad9398ac17ba40df60,
title = "Reference Thermal Chips for 2D and 3D Co-packaging Process Development",
abstract = "We present the concept and experimental realization of reference thermal chips as a way towards standardization of photonic packaging and a method to overcome the cost-barrier for optimization of packaging architectures. The reference thermal chips presented here are tested and co-packaged with reference photonic chips (reference PICs) in 2D and 3D stacked configurations. The effect of thermal dissipation of the reference thermal chip on reference PIC is characterized. This thermal coupling between the chips is then analysed by the measurement of the reference PIC surface temperature in 2D and 3D stacked architectures. The influence of thermal coupling on optical coupling efficiency is evaluated using grating coupler loopback structures on the reference PIC for both configurations. The results describe how such thermal reference chips can be used in the development of new assembly processes for co-packaged electronic and photonic systems.",
keywords = "optical characterization, reference PIC, reference thermal chip, thermal characterization",
author = "Parnika Gupta and Robert Bernson and Noreen Nudds and Sean Collins and Kamil Gradkowski and Morrissey, \{Padraic E.\} and Peter O'Brien",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 73rd IEEE Electronic Components and Technology Conference, ECTC 2023 ; Conference date: 30-05-2023 Through 02-06-2023",
year = "2023",
doi = "10.1109/ECTC51909.2023.00372",
language = "English",
series = "Proceedings - Electronic Components and Technology Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "2160--2165",
booktitle = "Proceedings - IEEE 73rd Electronic Components and Technology Conference, ECTC 2023",
address = "United States",
}