Selective area growth of InP on on-axis Si(001) substrates with low antiphase boundary formation

  • R. Loo
  • , G. Wang
  • , T. Orzali
  • , N. Waldron
  • , C. Merckling
  • , M. R. Leys
  • , O. Richard
  • , H. Bender
  • , P. Eyben
  • , W. Vandervorst
  • , M. Caymax

Research output: Chapter in Book/Report/Conference proceedingsConference proceedingpeer-review

Abstract

We discuss the selective epitaxial growth of InP on patterned Si (001) substrates with Shallow Trench Isolation using a thin Ge buffer to facilitate InP nucleation. The main focus is the defect formation mechanism during epitaxial growth and to develop solutions to reduce defect density so that device-quality III-V virtual substrates can be realized on large-scale Si substrates. We compare the InP growth on on-axis and off-axis Si substrates. In the case of off-axis wafers, the formation of stacking faults / twins cannot be avoided, at least not at one of the four STI side-walls. The formation of antiphase domain boundaries is reduced (but not yet completely eliminated) by engineering the local Ge surface profile. Further, the high density of Ge surface steps promotes step-flow growth mode instead of 3D growth during the growth of the InP seed layer. Finally, high aspect ratios (>2) allow to confine threading dislocations in the bottom of the trench.

Original languageEnglish
Title of host publicationULSI Process Integration 7
PublisherElectrochemical Society Inc.
Pages249-263
Number of pages15
Edition7
ISBN (Electronic)9781607682615
ISBN (Print)9781566779074
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event7th Symposium on ULSI Process Integration - 220th ECS Meeting - Boston, MA, United States
Duration: 9 Oct 201114 Oct 2011

Publication series

NameECS Transactions
Number7
Volume41
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Conference

Conference7th Symposium on ULSI Process Integration - 220th ECS Meeting
Country/TerritoryUnited States
CityBoston, MA
Period9/10/1114/10/11

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