Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition

Strained Ge p-channel gate-all-around (GAA) devices with Si-passivation are demonstrated on highdensity 45-nm active pitch starting from 300-mm SiGe strain relaxed buffer wafers. While single horizontal Ge nanowire (NW) devices are demonstrated, the process flow described in this paper can be adjusted to make vertically stacked horizontal Ge NWs to increase the drive per footprint. The demonstrated short-channel devices have round GeNWs with 9-nmdiameter andare the GeGAA devices with the smallest channel and gate dimensions (L_G = 40 nm) published to date. Electrostatics and off-state leakage are maintained down to the shortest gate lengths studied, showing drain-induced barrier lowering of 30mV/V and sub- 20 nA/μm I_off at V_DD = -0.5 V and L_G = 40 nm. The short-channel device subthreshold slope SS and performance can be further improved by use of high-pressure annealing in hydrogen, yielding the best SS_LIN and SS_SAT of 71 and 76 mV/dec reported so far for any L_G = 40-nm Ge pMOS channel device.