Temperature characterisation and parameter extraction for fine-geometry CMOS processes

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Abstract

Modern CMOS processes allow the design of high-speed and high-performance digital and mixed products. An important aspect of the design toolset is a set of device models that accurately characterise the process being used. While attention is given to the validation of models at room temperature, the operation of the models at lower and higher temperatures is often neglected. This paper analyses the performance of popular MOS models such as SPICE Level 3, BSIM2 and BSIM3 for predicting the behavior of MOSFET devices from sub-micron CMOS processes. MOSFETs from 1.0μm and 0.7μm processes have been measured over the temperature range from 50°C to 120°C and model parameter sets extracted at several temperatures. The variation of certain parameters with temperature is shown and the temperature coefficients evaluated. Most models allow at least threshold voltage and lowfield mobility to vary with temperature.

Original languageEnglish
Pages (from-to)13/1-13/7
JournalIEE Colloquium (Digest)
Issue number33
Publication statusPublished - 1995
EventIEE Electronics Division Colloquium on Advanced MOS and BI-Polar Devices - London, UK
Duration: 14 Feb 199514 Feb 1995

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