Test structures for understanding the impact of ultra-high vacuum metal deposition on top-gate MoS2 field-effect-transistors

  • Pavel Bolshakov
  • , Peng Zhao
  • , Christopher M. Smyth
  • , Angelica Azcatl
  • , Robert M. Wallace
  • , Chadwin D. Young
  • , Paul K. Hurley

Research output: Chapter in Book/Report/Conference proceedingsChapterpeer-review

Abstract

Greek crosses and TLM test structures were fabricated and characterized along with top-gate field effect transistors. We also show the usefulness and adaptation of a single TLM structure into multiple bottom-gate FETs that allow for extraction of contact resistance and typical device parameters for direct correlation on the same TMD flake enabling very little variability that can occur 'flake to flake'. Sheet resistance and contact resistance were successfully extracted and improvement in device performance was demonstrated with C-V and I-V measurements.

Original languageEnglish
Title of host publication2017 International Conference of Microelectronic Test Structures, ICMTS 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509036158
DOIs
Publication statusPublished - 20 Jun 2017
Event2017 International Conference of Microelectronic Test Structures, ICMTS 2017 - Grenoble, France
Duration: 27 Mar 201730 Mar 2017

Publication series

NameIEEE International Conference on Microelectronic Test Structures

Conference

Conference2017 International Conference of Microelectronic Test Structures, ICMTS 2017
Country/TerritoryFrance
CityGrenoble
Period27/03/1730/03/17

Keywords

  • Contact resistance
  • Greek cross
  • High-k
  • MoS
  • TLM
  • Top-gated transistor
  • Ultra-high vacuum

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