Testing regular arrays: the boundary problem

Research output: Contribution to conferencePaperpeer-review

Abstract

The authors present a unifying approach to the testing of fine-grained VLSI arrays. The approach covers a wide range of regular arrays and leads directly to test pattern generation. It includes the often overlooked but nontrivial problem of observing the fault effects, especially at the edges of the arrays. The problems and possible solutions are illustrated using the example of a systolic correlator.

Original languageEnglish
Pages304-311
Number of pages8
Publication statusPublished - 1989
Externally publishedYes
EventProceedings of the 1st European Test Conference - Paris, France
Duration: 12 Apr 198914 Apr 1989

Conference

ConferenceProceedings of the 1st European Test Conference
CityParis, France
Period12/04/8914/04/89

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